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iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 1/22 FEATURES o Hall sensor array with automatic signal control o Differential scanning for excellent magnetic stray field tolerance o Real-time tracking interpolation of up to 256 angle steps, permitting up to 12,000 rpm o Ratiometric output with 0.5 V to 4.5 V or 0 V to 5 V and selectable full-scale angle of 90, 180, 270 or 360 degrees o Programmable zero position o Fast, serial absolute angle data output o Easy daisy chaining of multiple sensors: all analog/digital outputs can be used in buses o Loss-of-magnet and excessive frequency indication via error output o Non-volatile setup provided by 3x reconfigurable Zener zap ROM o 5 V single-supply operation o Power-saving standby function o Operational temperature range of -40 to +125 C o Space-saving 10-pin DFN package measuring 4 mm x 4 mm APPLICATIONS o Contactless potentiometer o Absolute 360 angle sensor o Magnetic rotary encoders
PACKAGES
DFN10 4 x 4 mm
BLOCK DIAGRAM
Copyright (c) 2010 iC-Haus
http://www.ichaus.com
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 2/22 DESCRIPTION iC-MP consists of a quadruple Hall sensor array which has been optimized for the magnetic measurement of an axis angle. The array permits errortolerant adjustment of the magnet, reducing the time and effort required assembly. The integrated signal conditioning unit provides a differential sine/cosine signal at its outputs. The sensor generates one sine cycle per full rotation of the magnet, enabling the angle to be clearly determined. At the same time the internal amplitude control unit produces a regulated output amplitude of 2 Vpp, regardless of variations in the magnetic field strength, supply voltage and temperature. Furthermore, error signals are provided which report any magnet loss and an excessively high RPM speed. With the aid of the integrated 8-bit sine-to-digital converter the axis angle is determined from the sine/cosine signals. The absolute position angle is output via the serial interface together with a bit indicating an error. The maximum resolution of 8 bits is maintained up to revolutions of 12,000 rpm. The absolute angle is converted back to a linear analog output voltage using the internal D/A converter. The analog output voltage range can be programmed to be either rail to rail or 10 % to 90 % of the supply voltage. The angular range of the analog signal is configurable to 90, 180, 270 or 360. iC-MP can be easily cascaded, enabling scanning of multiple axes. In Fast Scanning Mode all devices connected in a queue are read consecutively. In Slow Scanning Mode (Power Save Mode) each individual device is booted up before the serial data or analog output voltage is put on the common bus.
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 3/22 CONTENTS PACKAGES ABSOLUTE MAXIMUM RATINGS THERMAL DATA ELECTRICAL CHARACTERISTICS SENSOR PRINCIPLE HALL SENSOR POSITION AND INTERNAL ANALOG SIGNALS LINEAR ANALOG OUTPUT (LAO) SERIAL OUTPUT (SLO) 4 5 5 6 FAST SCANNING MODE 8 SLOW SCANNING MODE APPLICATION CIRCUITS Stand-alone example . . . . . . . . . . . . . TEST MODES DESIGN REVIEW: Notes On Chip Functions 16 18 20 20 21 21 OPERATING MODES PROGRAMMING MODE ENERR . . . . . . . . . . . . . . . . . . . . . Calculating the position offset . . . . . . . . . CRCID . . . . . . . . . . . . . . . . . . . . . . 11 12 14 14 15
8 9 10
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 4/22 PACKAGES PIN CONFIGURATION DFN10 PIN FUNCTIONS No. Name Function 1 2 3 4 5 6 7 8 9 10 PSMI GND PSMO LAO MA SLO SLI VZAP VDD NERR TP The thermal pad must be connected to ground potential on the PCB. Orientation of the logo ( MP CODE ...) is subject to alteration. Power Save Mode Input Ground Power Save Mode Output Linear Analog Output Serial Clock Input Serial Data Output Serial Data Input Zapping Voltage Input +5 V Supply Voltage Error Message Output (low active) / Serial ROM Data Output Thermal Pad
1
10
2 3
4 5
9
iC-MP ... ...yyww
8
7 6
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 5/22 ABSOLUTE MAXIMUM RATINGS
These ratings do not imply operating conditions; functional operation is not guaranteed. Beyond these ratings device damage may occur. Item No. Symbol Parameter Supply Voltage at VDD Current in VDD Voltage at pins PSMI, PSMO, LAO, MA, SLO, SLI, NERR Voltage at pin VZAP Current in pins PSMI, PSMO, LAO, MA, SLO, SLI, NERR, VZAP Current in pins PSMI, PSMO, LAO, MA, SLO, SLI, NERR, VZAP ESD Susceptibility at all pins Junction Temperature Storage Temperature Range Pulse width < 10s HBM, 100 pF discharged through 1.5 k -40 -40 Conditions Min. -0.3 -20 -0.3 -0.3 -10 -100 Max. 6 20 VDD + 0.3 8 10 100 2 125 125 V mA V V mA mA kV C C Unit
G001 V() G002 I() G003 V() G004 V() G005 I() G006 I() G007 Vd() G008 Tj G009 Ts
THERMAL DATA
Operating conditions: VDD = 5 V 10 % Item No. T01 T02 Symbol Ta Rthja Parameter Operation Ambient Temperature Range Thermal Resistance, Chip to Ambient Package mounted on PCB, thermal pad at approx. 2 cm cooling area Conditions Min. -40 40 Typ. Max. 125 C K/W Unit
All voltages are referenced to ground unless otherwise stated. All currents flowing into the device pins are positive; all currents flowing out of the device pins are negative.
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 6/22 ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 5 V 10 % , Tj = -40 ... 125 C, unless otherwise stated Item No. 001 002 003 004 005 006 007 008 009 010 011 Symbol Parameter Conditions Min. VDD I(VDD) I(VDD)sb VDDon VDDoff VDDhys ton()1 ton()2 Vc()hi Vc()hi Vc()lo Supply Voltage Supply Current in VDD Standby Supply Current Power-On Threshold Power-Down Threshold Hysteresis Turn-On Delay Following Power-On PSMI = lo, other pins open PSMI = hi Increasing voltage VDD Decreasing voltage VDD VDDhys = VDDon - VDDoff Time to data valid after enabling, VDD: VDDoff VDDon 3.0 2.6 200 1 900 0.3 0.3 -1.5 1.6 1.6 -0.3 4.5 Typ. 5 8 Max. 5.5 12 200 4.1 3.9 V mA A V V mV ms s V V V Unit
General
Turn-On Delay Following Standby Time to data valid after standby, PSMI: hi lo Clamp Voltage hi at PSMI, MA, SLI, NERR Clamp Voltage hi at PSMO, LAO, SLO Clamp Voltage lo at PSMI, PSMO, LAO, MA, SLO, SLI, NERR, VDD, VZAP Operating Magnetic Field Strength Permissible RPM Speed Excessive Frequency Alarm Magnetic Field Frequency Diameter of Hall Sensor Array Chip Placement Tolerance Chip Tilt Angle Distance Surface of Package to Surface of Chip Converter Resolution Converter Hysteresis Absolute Angle Accuracy Magnet with 4 mm in diameter, axis centered to chip MODE(1:0) = 00 (range 360) MODE(1:0) = 01 (range 270) MODE(1:0) = 10 (range 180) MODE(1:0) = 11 (range 90) -1 dV0()hi = V(VDD) - V(LAO), MODE(3) = 0; I() = -1 mA I() = 0 mA MODE(3) = 0; I() = 1 mA I() = 0 mA 85 5 -5 2 2 -3 Versus DFN10 package outlines Versus DFN10 package outlines DFN10 package -0.2 -3 400 2 ENERR(1) = 1; NERR: hi lo 1 VDD = 0 V; I() = 1 mA VDD = 0 V; I() = 4 mA I() = -4 mA
Hall Sensor Array 101 102 103 104 105 106 107 108 Hext RPM ferr() fmag() dsens xpac pac hpac At surface of chip 20 50 100 12 000 200 0.2 3 kA/m rpm kHz Hz mm mm DEG m
Sine-To-Digital Converter 301 302 303 RES HYS AAabs Per 360 degree 8 1.4 3 bit DEG DEG
D/A Converter And Ratiometric Output LAO 401 RES() D/A Converter Resolution
8 7.5 7 6 1 170 85 170 85 95 15 5
bit bit bit bit mA mV mV mV mV %VDD %VDD A V/s V/s 2 V V
402 403
Iload() dV0()hi
Permissible Output Current Output Voltage hi, Rail-To-Rail
404
dV0()lo
Output Voltage lo, Rail-To-Rail
405 406 407 408 409 501 502
dV1()hi dV1()lo Ilk() SR()hi SR()lo Vt1()hi Vt1()lo
Output Voltage hi, 10/90% Range MODE(3) = 1; I() = -1...+1 mA Output Voltage lo, 10/90% Range MODE(3) = 1; I() = -1...+1 mA Leakage Current Slew Rate hi Slew Rate lo Voltage Threshold hi vs. GND Voltage Threshold lo vs. GND V(LAO) = 0...VDD, PSMI = hi V(LAO): 20% 80% of range V(LAO): 80% 20% of range
Zapping Input VZAP 0.8
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 7/22 ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 5 V 10 % , Tj = -40 ... 125 C, unless otherwise stated Item No. 503 504 505 506 507 508 601 602 603 604 605 606 607 701 702 703 704 705 706 801 802 803 902 904 905 906 907 908 909 910 911 912 913 Symbol Vt1()hys Vt2()hi Vt2()lo Vt2()hys Vzap() Izap() Vt()hi Vt()lo Vt()hys Ipu() fclk(MA) tzap(MA) tout(MA) Vs()hi Vs()lo Isc()hi Isc()lo tr() tf() Vs()lo Ilk() Isc()lo VREF Parameter Threshold Hysteresis Voltage Threshold hi vs. VDD Voltage Threshold lo vs. VDD Threshold Hysteresis Permissible Zapping Voltage Required Zapping Current Input Threshold Voltage hi Input Threshold Voltage lo Input Hysteresis Input Pull-up Current Permissible Clock Frequency at MA Vt()hys = Vt()hi - Vt()lo V() = 0...VDD - 1 V Normal mode 0.8 230 -240 0.080 4.5 5 -120 -10 10 5.5 15 0.4 0.4 -90 10 -10 90 60 60 0.4 -5 4.5 45 50 2 VREF 2 VREF 2 VREF 2 VREF -50 0.95 50 1.05 5 90 55 Conditions Min. Vt1()hys = Vt1()hi - Vt1()lo Vt2()hi = V() - VDD, VDD = 5 V 5%, Tj = 10 ... 40 C Vt2()lo = V() - VDD; VDD = 5 V 5%, Tj = 10 ... 40 C Vt2()hys = Vt2()hi - Vt2()lo VDD = 5 V 5%, Tj = 10 ... 40 C VDD = 5 V 5%, Tj = 10 ... 40 C 0.7 20 7.3 7.4 150 7.5 90 2 230 Typ. Max. 400 1.3 mV V V mV V mA V V mV A MHz s s V V mA mA ns ns V A mA %VDD Vpp V Vpp V Vpp V Vpp V mV Unit
Serial Interface and Power Save Mode Inputs: MA, SLI, PSMI
Permissible Zapping Cycle at MA Programming mode, VDD = 5 V 5%, Tj = 10 ... 40 C Interface Timeout Saturation Voltage hi Saturation Voltage lo Short-Circuit Current hi Short-Circuit Current lo Rise Time Fall Time Saturation Voltage lo Leakage Current Short-Circuit Current lo Reference Voltage at LAO Time from MA last edge to SLO lo hi Vs()hi = VDD - V(), I() = -4 mA I() = 4 mA V() = 0 V V() = VDD CL() = 50 pF, V(): 20 80% CL() = 50 pF, V(): 80 20% I() = 4 mA V() = 0...VDD, PSMI = hi V() = VDD Op. mode: Test 2 Op. mode: Test 0 Op. mode: Test 0 Op. mode: Test 0 Op. mode: Test 0 Op. mode: Test 1 Op. mode: Test 1 Op. mode: Test 1 Op. mode: Test 1 dVoff() = V(PSIN) - V(NSIN), dVoff() = V(PCOS) - V(NCOS) VR() = V(PSIN) / V(PCOS), VR() = V(NSIN) / V(NCOS)
Serial Interface and Power Save Mode Outputs: SLO, PSMO
I/O Interface NERR
Test Signals at NERR, LAO, PSMO (iC-Haus device test only) Vpp(PSIN) Pos. Sine Sensor AC Signal at NERR Vdc(PSIN) Pos. Sine Sensor DC Signal at NERR Vpp(PCOS) Pos. Cosine Sensor AC Signal at LAO Vdc(PCOS) Pos. Cosine Sensor DC Signal at LAO Vpp(NSIN) Neg. Sine Sensor AC Signal at NERR Vdc(NSIN) Neg. Sine Sensor DC Signal at NERR Vpp(NCOS) Neg. Cosine Sensor AC Signal at LAO Vdc(NCOS) Neg. Cosine Sensor DC Signal at LAO dVoff() VR() Diff. Sine and Cosine Signal Offsets Sine/Cosine AC Signal Ratio
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 8/22 SENSOR PRINCIPLE coder system or a contactless potentiometer. A diametrically magnetized, cylindrical permanent magnet made of neodymium iron boron (NdFeB) or samarium cobalt (SmCo) generates optimum sensor signals. The diameter of the magnet should be in the range of 3 mm to 6 mm. The iC-MP has four Hall sensors adapted for angle determination and to convert the magnetic field into a measurable Hall voltage. Only the z-component of the magnetic field is evaluated, whereby the field lines pass through two opposing Hall sensors in the opposite direction. Figure 1 shows an example of field vectors. The arrangement of the Hall sensors is selected so that the mounting of the magnets relative to iC-MP is extremely tolerant. Two Hall sensors combined provide a differential Hall signal. When the magnet is rotated around the longitudinal axis, sine and cosine output voltages are produced which can be used to determine angles.
S
N
z y x
B
+Bz
-Bz
C151107-1
Figure 1: Sensor principle
In conjunction with a rotating permanent magnet, the iC-MP module can be used to create a complete en-
HALL SENSOR POSITION AND INTERNAL ANALOG SIGNALS The Hall sensors are placed in the center of the DFN10 package at 90 to one another and arranged in a circle with a diameter of 2 mm as shown in Figure 2. In order to calculate the angle position of a diametrically polarized magnet placed above the device a difference in signal is formed between opposite pairs of Hall sensors, resulting in the sine being VSIN = VPSIN VNSIN and the cosine VCOS = VPCOS - VNCOS . The zero angle position of the magnet is marked by the resulting cosine voltage value being at a maximum and the sine voltage value at zero.
This is the case when the south pole of the magnet is exactly above the PCOS sensor and the north pole is above sensor NCOS, as shown in Figure 3. Sensors PSIN and NSIN are placed along the pole boundary so that neither generate a Hall signal. Figure 2: Position of the Hall sensors When the magnet is rotated counterclockwise the poles then also cover the PSIN and NSIN sensors, resulting in the sine and cosine signals shown in Figure 4 being produced. The signals are internal but can be made externally available for test purposes (see chapter 'TEST MODES').
When a magnetic south pole comes close to the surface of the package the resulting magnetic field has a positive component in the +z direction (i.e. from the top of the package) and the individual Hall sensors each generate their own positive signal voltage.
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 9/22
Figure 3: Zero position of the magnet
Figure 4: Pattern of the internal analog sensor signals with the angle of rotation
LINEAR ANALOG OUTPUT (LAO) The LAO pin provides a linear analog output voltage representing the actual position. The output voltage can be either rail to rail or within a range of 10% to 90% of the supply voltage VDD, depending on the programmed configuration. In 10%-to-90% mode a shortcircuit with VDD or GND is recognizable. The zero position therefore begins at the minimum voltage (either GND or 10% of VDD) and reaches its maximum (either VDD or 90% of VDD) at the selected angular range limit (90, 180, 270 or 360), depending on the chosen configuration. LAO is tristate when the device is disabled.
Figure 5: Linear analog output voltage
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 10/22 SERIAL OUTPUT (SLO)
Figure 6: Serial data timing D0 to D7 make up the absolute position data with respect to the programmed position offset (OFFSET1 xor OFFSET2 xor OFFSET3). The absolute position is latched by a low to high transition at MA (see T1). After an acknowledge (T2) at SLO iC-MP requests processing time until the start condition (T3) is sent. Processing time must be provided in Slow Scanning Mode during startup. With rising edge T4 at the clock pin the most significant bit (D7) is placed on the serial data line SLO. After T5 has elapsed the controller can stop clocking at MA and the device is ready to latch a new position after a timeout (tout ). If the controller continues to clock in a daisy chain in Fast Scanning Mode after T5 has elapsed, the second device (slave 2) outputs the position latched at T1 at pin SLO. The absolute position data (D0-D7) is binary coded. The position data and the error bit (NERR) are CRC protected. The CRC polynomial is X4 +X+1 = 0x13.
Figure 7: Example CRC calculation
Figure 8: Timing in Fast Scanning Mode
Figure 9: Timing in Slow Scanning Mode
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 11/22 OPERATING MODES
Figure 10: Operation Modes Figure 10 shows the different modes of iC-MP. There are two major modes of operation: * Normal Mode: Readout position data and error bit. Normal mode is subdivided into two minor modes of operation: - Fast Scanning Mode: iC-MP is always activated. - Slow Scanning Mode (Power Save Mode): iC-MP goes into Slow Mode Sleep following the first transmission of sensor data via the serial interface. * Programming Mode: iC-MP can be configured in programming mode. See the chapter on 'PROGRAMMING MODE' for further details. There are three minor modes: - Read ROM: iC-MP's Zener zap ROM structure is read. - Write RAM: iC-MP's internal registers can be temporarily programmed for test purposes. - Write ROM: iC-MP's zapping structure is programmed. A Power-On Reset is required after a Read ROM and Write ROM instruction. Each state is quit by a PowerOn Reset.
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 12/22 PROGRAMMING MODE When pulling the VZAP pin to high during startup, the programming mode is entered (see 'OPERATING MODES'). In this mode there are three different categories of operation: * Write ROM Mode (V(VZAP) = Vzap (), according to ELEC.CHAR., no. 507): In Write ROM Mode each Zener zap diode is burned (= zapped) immediately on the rising edge of MA. See Figure 13 for details. For the conditions of operation of Write ROM Mode, see ELEC.CHAR., 'Zapping Input VZAP'. * Write RAM Mode (V(VZAP) = VDD): In Write RAM Mode the iC-MP reacts as in Write ROM Mode but there is no zapping of the Zener zap diodes. This mode can be used to temporarily program iC-MP (non-permanent) for test purpose. * Read ROM (V(VZAP) = VDD): In Read ROM Mode the content of the Zener zap diodes is read out. A Read ROM operation overwrites iC-MP's RAM content.
Figure 11: Serial timing of Read ROM Mode
Figure 12: Serial timing of Write RAM Mode
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 13/22
Figure 13: Serial timing of Write ROM Mode Figure 13 shows the serial timing of a Write ROM operation (burning the Zener zap diodes). The bit stream is described in Table 4. Each Zener zap diode can be programmed once with a logic of '1'. The default value of the Zener zap diodes is a logic '0' (with the exception of ZTEST(1:0)). The resulting parameter (OFFSET, MODE and ENERR) are generated by an xor operation of the three sets of bits (see Figure 15).
Figure 14: In-circuit programming A 100 nF ceramic block capacitor must be placed on the board directly between iC-MP's VZAP and GND pins. A 10 F capacitor must also be present at the end of the programming line as close to the connector as possible (see Figure 14). During programming, up to 90 mA flow from pin VZAP to pin GND, making it necessary to ensure proper PCB layout to minimize voltage drops.
Figure 15: ROM construction
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 14/22
D(51:0) 7:0 11:8 13:12 21:14 25:22 27:26 35:28 39:36 41:40 45:42 47:46 Parameter OFFSET1(7:0) MODE1(3:0) ENERR1(1:0) OFFSET2(7:0) MODE2(3:0) ENERR2(1:0) OFFSET3(7:0) MODE3(3:0) ENERR3(1:0) CRCID(3:0) ZTEST(1:0) Description Offset of the first set Mode of the first set, see Table 5 and 6 Error mask of the first set, see Table 8 Offset of the second set Mode of the second set, see Table 5 and 6 Error mask of the second set, see Table 8 Offset of the third set Mode of the third set, see Table 5 and 6 Error mask of the third set, see table 8 CRC ID Zener zap diodes, for iC-Haus test purposes only See 'TEST MODES'
ENERR The parameter ENERR indicates two kind of errors. If the magnetic field strength is at low a 'Loss of Magnet' is generated. An 'Excessive Frequency Alarm' is generated when the revolution per minute is to high. Parameter ENERR handles the various error types.
ENERR1(1:0) ENERR2(1:0) ENERR3(1:0) Code 00 01 10 11 Error No Error Loss of Magnet* Excessive Frequency Alarm Excessive Frequency Alarm or Loss of Magnet* D(13:12) D(27:26) D(41:40)
*) see 'DESIGN REVIEW'
Table 8: Error masks Calculating the position offset Before iC-MP outputs the actual position via the serial interface or the linear analog output (LAO), an offset is added internally. This offset consists of the following parameters: OFFSET = OFFSET1 xor OFFSET2 xor OFFSET3 The offset is programmed in several stages (see Figure 16). It is important that the direction of rotation is programmed prior to this (MODE Bit 2). To determine the actual configured offset, all three offset parameters must be read out. After these parameters have been xored the actual offset is determined: Actual Offset = OFFSET1 xor OFFSET2 xor OFFSET3 To calculate the new offset the actual position at the required offset is required. The formula used to calculate this new offset is as follows: New Offset = 256 - Actual Position + Actual Offset
51:48
TEST(3:0)
Table 4: Programming Datastream
MODE1(1:0) MODE2(1:0) MODE3(1:0) Code 00 01 10 11 360 270 180 90 D(9:8) D(23:22) D(37:36) Full Scale Angle
Table 5: Linear Analog Output - Mode Bit 1:0
MODE1(2) MODE2(2) MODE3(2) Code 0 1 CW* CCW* D(10) D(24) D(38) Rotation
*) CW = clockwise, CCW = counter-clockwise
Table 6: Mode Bit 2
MODE1(3) MODE2(3) MODE3(3) Code 0 1 D(11) D(25) D(39) Range (0 % - 100 %) * VDD (10 % - 90 %) * VDD
Table 7: Linear Analog Output - Mode Bit 3
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 15/22 CRCID The CRCID parameter contains the CRC start value. Configuring the CRC starting value enables a data value to be clearly assigned to a slave, as the CRC check fails with a faulty configuration of the master or an exchange sequence. For example, the controller assigns a start value for each slave and writes these to the CRCID slave parameter. For CRC calculation, see 'SERIAL OUTPUT (SLO)'.
Figure 16: Principle of offset calculation
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 16/22 FAST SCANNING MODE
VZAP PSMI
FAST SCANNING
MP0 XFS3
VDD
VZAP
MP0 XFS2
VDD
VZAP
MP0 XFS1
VDD
VZAP
Hall Angle Encoder
Hall Angle Encoder
Hall Angle Encoder
PSMI SLI R1 2.2k SLI MA
SLAVE 3
B
PSMO SLO NERR LAO
PSMI SLI MA
SLAVE 2
B
PSMO SLO NERR LAO
PSMI SLI MA
SLAVE 1
B
PSMO SLO NERR LAO
GND MA NERR LAO(2:0) SLO
GND
GND
0
1
LAO(2:0)
2
Figure 17: Fast Scanning Mode In Fast Scanning Mode all devices are active at the same time. With a start condition at MA the absolute position of all devices is latched and all absolute positions are transferred as one long data word (see page 17). Parameter CRCID can be used for improved differentiation of the individual data words. See 'PROGRAMMING MODE'.
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 17/22
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 18/22 SLOW SCANNING MODE
VZAP PSMI SLOW SCANNING
MP0 XSS3
VDD
VZAP
MP0 XSS2
VDD
VZAP
MP0 XSS1
VDD
VZAP
Hall Angle Encoder
Hall Angle Encoder
Hall Angle Encoder
R1 2.2k SLI
PSMI SLI MA
SLAVE 3
B
PSMO SLO NERR LAO
PSMI SLI MA
SLAVE 2
B
PSMO SLO NERR LAO
PSMI SLI MA
SLAVE 1
B
PSMO SLO NERR LAO
GND
GND
GND
MA NERR LAO SLO
Figure 18: Slow Scanning Mode In Slow Scanning Mode only one device is activated in a chain. This device transmits its absolute position on the SLO bus and the analog output voltage to the LAO bus. After an timeout at SLI, the next device is enabled (PSMO hi lo). The devices needs some time after activation to find the actual position. Parameter CRCID can be used for improved differentiation of the individual data words. See 'PROGRAMMING MODE'. The chain is reset by a logic high at the PSMI pin (see page 19). Application hints: See 'DESIGN REWIEW'.
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 19/22
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 20/22 APPLICATION CIRCUITS Stand-alone example Figure 19 shows an example circuit for stand-alone operation of iC-MP. The device is in Fast Scanning Mode. If the device is also to be programmed, pins PSMI, SLI and VZAP should be connected to GND by a pull-down resistor (e.g. 2.2 k).
Figure 19: Circuit for stand-alone operation
iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 21/22 TEST MODES iC-MP has several test settings which make internal reference quantities and the amplified, differential Hall voltages of the sensor pairs accessible at external pins for measurement purposes. This signals enables a chip/package to be adjusted in relation to the magnet.
Op. Mode Normal Test 0 Test 1 Test 2 Notes TEST(3:0) 0ddd 1000 1001 1010 d = don't care Pin NERR analog PSIN NSIN GAIN digital NERR -
Test modes can be triggered by programming the parameter TEST (D(51:48)). The individual test modes are listed in the following table. See 'ELECTRICAL CHARACTERISTICS'.
Pin PSMO PSMO PSMO PSMO PSMO Comments
Pin LAO LAO PCOS NCOS VREF
Table 9: Test modes
DESIGN REVIEW: Notes On Chip Functions
iC-MP Y No. 1
Function, Parameter/Code Slow Scanning Mode (without a magnet):
Description and Application Notes Serial Interface Mode is discontinued without a magnet - The start bit is not available - The daisy chain is stopped
Table 10: Notes on chip functions regarding iC-MP chip releas Y
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iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 22/22 ORDERING INFORMATION
Type iC-MP Evaluation Board
Package DFN10
Order Designation iC-MP DFN10 iC-MP EVAL MP1D
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